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Analog IC Design Engineer

Engineering
San Jose, CA · Hybrid, 3 days in office$170,000 – $215,000Full-timeStarts Jan 25, 2027

At a glance

Pay
$170k – $215kbase salary
Employment
Full-time
Location
San Jose, CA · Hybrid, 3 days in officeTravel: Up to 10%
Start
Jan 25, 2027
Experience
5+ years
Education
Master's Degree
Work authorization
US Citizen, Green Card
Visa sponsorship
Case by case
Reports to
Analog Design Manager
Team
Analog · 14 people

The role

Design DC-DC converters and LDOs for EV power chips.

What you'll do

  • Design and simulate analog blocks
  • Review layout with mask designers
  • Validate silicon in the lab
  • Share progress with the Analog Design Manager

Qualifications

Must have

  • 5+ years of hands-on experience with Analog design and Cadence Virtuoso
  • Master's degree in electrical engineering, or equivalent experience
  • Working knowledge of Power management and Spice simulation

Nice to have

  • Experience at a company of similar size
  • Bilingual in English and Spanish
Analog designCadence VirtuosoPower managementSpice simulationSilicon validation

Pay & benefits

Base salary
$170k – $215k
San Jose, CA range

Benefits

  • Medical, dental and vision
  • 401(k) with match
  • Paid time off

Hiring process

  1. 1Recruiter call30 min
  2. 2Hiring manager interview45 min
  3. 3Team interview60–90 min

Typical timeline: About 2–3 weeks

How to apply: Resume. Applications close Mar 31, 2027.

The base salary range above ($170,000 – $215,000) reflects what the employer expects to pay for this role in San Jose, CA. The final offer depends on experience, skills and location.

The employer is an equal opportunity employer. Qualified applicants are considered without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or veteran status.

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